The critical dimension defines a digital semiconductor process’s refinement. A 3 nm process is better than a 5 nm one, which is better than a 7 nm one. Although advancing lithography is essential to critical-dimension reductions, so too are myriad other developments. Interconnect is an area requiring new technology for dimensional scaling to continue. Startup Destination 2D has developed a graphene interconnect based on a cofounder’s research at the University of California, Santa Barbara (UCSB).
Parallel copper-wire planes interconnect transistors within a CMOS chip. Shrinking the design requires narrowing the wires. However, thinner wires have greater resistance, slowing signal propagation between the transistors. Making them taller would offset the width reduction, keeping resistance low. But this wouldn’t affect signal speed because it would increase capacitance, another performance limiter.
Doping to Win
Researchers have considered various ways to keep shrinking copper or to replace it with a different material. None have proven feasible or practical, but UCSB professor Kaustav Banerjee and his students have developed a way to make graphene work. Banerjee joined industry veteran Ravi Iyengar to commercialize and scale the technology, cofounding Destination 2D.
The UCSB team’s intercalation-doped multilayer graphene (MLG) inserts atoms such as FeCl3 between graphene sheets, catapulting electrical performance well past that of copper. To make MLG compatible with CMOS fabrication, the researchers developed a technique for growing it at 300°C, which is below the 400°C threshold required to preserve transistor integrity. Moreover, the technique employs chemical vapor deposition (CVD) instead of graphene transfer, mitigating complexity and risk.
Destination 2D offers the CoolC GT300 machine to synthesize graphene on 300 mm wafers. The company seeks alpha customers and expects chipmakers to qualify the systems in a few years and deploy them around the decade’s end. By then, foundries will be producing 1 nm transistors, which are a few generations more advanced than today’s leading edge. Innovations such as those Destination 2D is commercializing are required for foundries to keep delivering the generational process-technology advancements that designers depend on to make ever-faster XPUs.