• Matrix Multiplication Comes to x86

    The x86 Ecosystem Advisory Group (EAG, better known as AMD and Intel) has defined the AI Compute Extensions (ACE) for the x86 architecture. The group frames these instructions as a palette, a term Intel coined for a specific configuration of its Advanced Matrix Extensions (AMX). Those AI-focused instructions and associated hardware first appeared in Sapphire… continue reading

  • Google TPUv8: Early Specs and Performance Gains

    Google TPUv8

    Google has unveiled its eighth-generation AI accelerator, revealing a design similar to past designs but with greater per-socket throughput, faster networking, and new collective engines. Per-chip gains should improve cost per token and performance, particularly as large language models grow well beyond 1 trillion parameters. As with some previous generations, the new accelerator (NPU) has… continue reading

  • Hynix Infusion Helps Semidynamics Diversify into AI Chips

    SK Hynix and Semidynamics logos inside heart

    Memory giant SK Hynix has invested in RISC-V supplier Semidynamics, helping the CPU designer expand into chips, boards, and systems for data-center AI inference. The Spanish startup joins Arm and fellow European RISC-V supplier Codasip in moving beyond IP. Semidynamics Evolves from RISC-V IP to AI Systems Semidynamics began as a design services company. It… continue reading

  • Codasip Pivots Away from RISC-V IP

    slot machine showing three cherries

    Following a year-long process to sell the company, RISC-V licensor Codasip restructured this month. On Semiconductor (Onsemi) has acquired the CPU design (IP) operation, and we expect it to use the Codasip cores in its chips and those of its ASIC customers. Codasip continues, licensing its CPU-customization tool to Onsemi, licensing its Cheri security technology,… continue reading

  • BWR 12: The Memory Episode

    Thumbnail featuring Joe, Bob, Gary, and Jim

    Joe and Bob welcome noted memory analyst Jim Handy and MEXT CEO Gary Smerdon to the show to talk about the memory crisis and MEXT’s DRAM-conserving technology. continue reading

  • BWR 11: GTC and OFC

    BWR 11 thumbnail

    In this episode of the Byrne-Wheeler Report, hosts Joe and Bob discuss the latest developments in processors and interconnect, with a focus on data center infrastructure. Recorded shortly after major industry conferences GTC and OFC, the discussion offers an insider’s perspective on how the industry is racing to meet the demands of generative AI. The… continue reading

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