• What Roadmap Details Did Intel’s 4Q24 Call Reveal?

    Icelandic Horse

    Intel’s 4Q24 earnings call revealed mixed messages about its 18A process, and we believe upcoming data-center chips Clearwater Forest and Jaguar Shores will be axed. continue reading


  • OpenAI Mirrors Hyperscalers in Trying to Make an AI Chip

    OpenAI blossom logo

    Reuters is reporting OpenAI will tape out its first AI processor (NPU) later this year. Pilot deployments will focus on inference, but the NPU can also perform training. Broadcom is aiding OpenAI with chip development, and TSMC will fab it in a 3 nm process. Richard Ho helms the project, coming to OpenAI in 2023… continue reading


  • DeepSeek-R1 Resets AI-Development Expectations

    A-ha motorcycle race

    DeepSeek-R1 slipped into the world on January 20, a day before Sam Altman and friends kicked off his Stargate OPM incinerator. DeepSeek soon overshadowed Stargate, playing down its costs while Stargate did the opposite. Nvidia’s stock tumbled on the belief that DeepSeek showed significant AI advancements required a tiny fraction of the investment previously assumed.… continue reading


  • Xsight Labs Develops 800 Gbps DPU That Hosts Linux

    Xsight E1 software stack

    Xsight Labs will soon sample the E1 DPU to complement its X2 switch. Although 800 Gbps capable, it runs packets through its 64-core Arm Neoverse cluster. The E1 promises a simple programming model, flexibility, and performance. continue reading


  • Arm Publishes Chiplet System Architecture Spec

    chiplet diagram reminiscent of CSA flag

    Arm has published the first Chiplet System Architecture (CSA) specification, aiming to accelerate Neoverse adoption. The CSA initiative allows customers to acquire pre-built CPU dies, simplifying complex chip designs. The CSA spec covers interfaces, management, and security, hurdles to widespread merchant chiplet deployment. continue reading


  • Marvell Structera Transcends CXL Memory Expansion

    Marvell Structera A chip

    Marvell’s Structera CXL chips boost memory bandwidth and capacity. Structera A, a DPU with 16 Neoverse-V2 cores, accelerates workloads, while Structera X expands memory capacity and supports dual-host pooling. Sampling now, both accelerate encryption and compression to add security and increase effective memory capacity. continue reading



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