Innatera announced the availability of Pulsar, its second-generation sensor-processing chip, in May. To continually analyze sensor data, Pulsar accelerates spiking neural networks (SNNs), a neuromorphic AI technology suited to low-power applications. Because Pulsar integrates a RISC-V core, we designate it as a microcontroller (MCU). Another viewpoint is that it’s an NPU that has just enough general-purpose processing to stand on its own.
Spun out of Delft University of Technology in the Netherlands, Innatera counts the European Innovation Council (a fund operated by the European Union) and other venture capital organizations. Founded in 2018, Innatera completed its Series A funding in June 2024, adding that round’s $21 million to the company’s $6 million of seed financing. The company’s cofounders and technical leaders each possess university and industry experience.
Housed in a tiny 2.8 × 2.6 mm package and typically operating below 1 mW, Pulsar targets battery-powered designs processing input from radar, microphones, infrared, and other sensors. It offers various interfaces to connect standard sensors. An analog SNN engine provides low-power inference. A digital SNN engine complements it, adding the capability to process data spanning a longer duration. A third AI engine for convolutional neural networks (CNNs) and an FFT/IFFT unit enhance Pulsar’s computing capabilities.
Amidst the competitive MCU market and having outlasted a few edge-AI companies, Innatera stands out for delivering a low-power, low-cost sensor-processing chip. Conservative industrial-electronics companies will find Pulsar enables new features in their designs, which they will weigh against the unfamiliarity of SNNs and the risk of sourcing from a startup.
Spiking Neural Networks
Inspired by the brain, SNNs are a type of neuromorphic computing. Encoding information in the timing of pulses (spikes), they differ from prevalent AI models, such as convolutional neural networks (CNNs) and transformers. For example, as a pixel in a camera’s image sensor changes brightness, a neuron’s potential (represented by a voltage or numeric value) increases until it reaches a threshold, triggering a spike that propagates to another neuron before resetting to a neutral state. An SNN is therefore event driven and suitable for classifying continuous-time signals, such as the output of video, audio, radar, and other sensors.
Pulsar has analog and digital SNN engines. To store neuron states, the analog approach uses capacitors. These intrinsically map to the spiking neuron model, building charge as they receive input and slowly leaking it if left unstimulated. As in animal brains, a synapse scales the input signal carried by a sequence of spikes (spike train) and sends it to a neuron.
Like other neural networks, an SNN’s weighting process involves multiplication by a constant. Whereas most AI accelerators use digital circuits to multiply, Innatera’s employs analog multipliers. The neurons are along one edge of the synapse grid and contain the capacitors and simple control circuits to set the threshold that triggers an output spike.
Because the characteristics of neighboring transistors and other structures will be more similar than those further away on a chip, Innatera segments the analog SNN engine. The Pulsar has four of these segments, each containing an array of synapses connected to a set of neurons. Applications operating over a longer time scale and needing state retention can use the digital engine. Its design follows the same principles as its analog counterpart but employs digital circuits.
Innatera Pulsar vs. T1
Pulsar is the production version of Innatera’s T1 MCU, which followed engineering chips provided to lead customers. The T1 was the company’s first integration of its SNN technology in an MCU and sampled at the start of 2024. The T1 integrates an analog SNN engine and sensor interfaces, such as I2S, SPI, PDM (which employs a simple pulse-based encoding), and AER (a niche event-based interface for neuromorphic electronics). Both Pulsar and the T1 feature a RISC-V core, primarily for controlling chip functions and managing I/O.
Pulsar offers more standard interface options than the T1, dropping AER support while adding an ADC, a camera interface (CIF), and a PCM interface. The result is a chip better able to connect to common sensors, obviating the need for customers to use SNN-friendly ones. An encoder/decoder block converts these sensor inputs to the spikes the SNN engines require, as Figure 1 illustrates.
Pulsar integrates a digital SNN engine, along with an analog one like that in the T1. It also adds a CNN accelerator. Innatera expects customers to employ multiple neural networks, such as for processing different data (e.g., audio and video) or for implementing a processing ladder (e.g., activating face recognition after detecting a person’s presence). For pre- and postprocessing sensor data, Pulsar includes an FFT/IFFT accelerator.
An open-source CV32E40P design, the RISC-V core still mainly marshals data in and out of the chip. The two SNN engines, the CNN engine, and the FFT/IFFT accelerator handle most processing. To improve the practicality of employing the CPU for other processing tasks, it adds an FPU, and the on-chip central RAM expands to 384 KB, as Table 1 details. Pulsar does not include nonvolatile memory, requiring designs to employ a separate flash chip. Innatera withholds price information from the public, but we expect Pulsar to sell for less than $5 in high volume.
Pulsar |
|
|---|---|
Analog SNN Engine Size |
16K parameters |
Digital SNN Engine Size |
49K parameters |
CNN AI Engine Size |
128K parameters |
CNN Peak Throughput |
32 MACs/cycle |
CNN Data Type |
INT8 |
CPU |
CV32E40P RISC-V |
Max CPU Speed |
160 MHz |
CPU Performance |
1.23 DMIPS/MHz, 2.78 CoreMark/MHz |
On-Chip Memory |
384 KB, 128 KB CNN, 32 KB retention SRAM |
Die Size |
2.8 × 2.6 mm |
Package |
36-pin WLCSP |
Temperature |
–40 to + 125 C |
Process |
TSMC 28 nm |
Power |
10 mW max, 0.5 mW typ |
Availability |
Production 2Q25 |
Competition
Several companies have developed neuromorphic AI accelerators, and others have developed NPU-integrated MCUs, including:
- BrainChip offers its Akida licensable NPU, which supports CNNs, vision transformers, and SNNs. Through licensees such as Prophesee (which offers AI-enabled image sensors) and Renesas, BrainChip indirectly competes with Innatera.
- Ambient Scientific employs analog circuits for math operations to save power but targets conventional neural networks (e.g., CNNs) instead of SNNs. The company’s GPX-10 chip is an MCU. However, it’s beefier than Pulsar, integrating a Cortex-M4F and 512 KB of flash. The Ambient Scientific chip is physically larger (approx. 10×10 mm) than Pulsar but is also low power. It can require 120 mW yet only needs 20–120 µW in a low-power, always-on state, such as for image detection.
- Aspinity is sampling its second chip, the AML200 NPU. Like the previous AML100, it targets battery-operated designs for keyword, glass-breakage, and alarm-tone detection. Aspinity’s NPU is analog based and capable of 10-bit precision.
- Syntiant has developed edge NPUs, including the NDP250, which integrates an audio DSP and an Arm Cortex-M0 CPU that enables standalone operation. Most Syntiant chips target audio and similar sensor processing, and the NDP200 series also performs computer vision. The company’s NPU is an at-memory design, distributing memory among processing elements to conserve power compared with centralized memory. Syntiant is among Innatera’s closest competitors.
- STMicro offers the STM32N6 microcontrollers, which integrate NPUs, Arm Cortex-M55 CPUs, video codecs, Ethernet ports, and other functions typical of a high-performance MCU targeting the broad market rather than Innatera’s sensor-processing niche.
- GrAI Matter Labs was developing NPUs for event-driven input before Snap (the company behind the Snapchat app and ugly Spectacles augmented-reality glasses) acquired it, eliminating it as an Innatera competitor.
- Greenwaves developed low-power MCUs integrating RISC-V cores and NPUs, primarily targeting audio applications before its 2025 liquidation.
Applications
Innatera targets consumer and industrial functions such as audio-scene classification, presence detection, people counting, and anomaly detection. The company collaborates with sensor suppliers, including Aria Sensing (UWB), Socionext (radar), and Melexis (infrared). Pulsar connects to a sensor, analyzes its output, and signals a system’s main SoC. Pulsar’s low power enables always-on operation, enabling the power-hungry SoC to sleep when unneeded. Applications include building security, fall detection, HVAC management, and noise-canceling headphones. Consistent with targeting industrial applications, Innatera qualifies Pulsar for the full industrial temperature range.
Innatera enables developers without SNN expertise to build applications. It does not, however, hide the underlying SNN engine by converting CNNs or other common network types to run on the SNN engines. Developers can choose a model from Innatera’s zoo or create one in PyTorch, using Python extensions the company directly supplies to developers. Innatera’s Talamo SDK compiles neural networks and integrates them with the drivers required to operate Pulsar and link functions (e.g., FFTs) in a signal-processing chain. The company delivers a complete development environment in a container (“dev container”), to help ensure it’s properly set up and consistent among different operating systems and distros.
Bottom Line
Large companies dominate the MCU market, and startups commercializing SNN processing and analog NPUs have struggled. Against that backdrop, Innatera developed its second product on a budget of less than $25 million. Compared with the T1 prototype, the new Pulsar adds capabilities to support more neural networks, perform additional signal processing, and connect to sensors over standard interfaces.
Pulsar is a focused product, only processing sensor inputs. Owing to its small package and low cost, it should slip into many designs, supplementing their core capability with AI-based sensor processing while conserving energy by allowing other system functions to sleep until Pulsar activates them. As with other AI startups—particularly those accelerating SNNs—customer acceptance will hinge on developer-tool quality.