
Condor Computing’s new Cuzco RISC-V core uses novel time-based instruction issuing, reducing power and area by eliminating CAM circuits and instruction replays. It’s a major microarchitectural innovation that exemplifies the opportunities the open RISC-V architecture fosters. continue reading

This video discusses reports that have surfaced indicating that Intel 18A has poor yields. continue reading

Four years after disclosing its D1 AI accelerator (NPU), the heart of its Dojo system, electric-car company Tesla has pulled the plug. After unveiling the D1, the company touted grand plans, promising in July 2023, when it began Dojo production (a year after the initial public target), that it will have deployed enough computing capacity… continue reading

The US proposes a 100% semiconductor tariff on imports. Details are unclear, but it could hit some unexpected countries. continue reading
AMD Apple APU/IGP Arm auto Broadcom Ceva CPU data center DPU DSP edge AI embedded Enfabrica Epyc FPGA Google GPU Imagination Intel Marvell MCU MediaTek memory Meta Microsoft MLPerf networking NPU (AI accelerator) Nvidia NXP OpenAI PC policy process tech Qualcomm RISC-V SambaNova SiFive smartphone SoftBank software Tenstorrent Tesla Untether